1. Field of the Invention
The present invention generally relates to a method and an apparatus for inspecting semiconductor wafers or substrates. More specifically, the present invention relates to a method and an apparatus for inspecting semiconductor wafers or substrates based on a recipe that defines a process for inspecting the wafers or substrates.
Priority is claimed on Japanese Patent Application No. 2004-379694, filed Dec. 28, 2004, the content of which is incorporated herein by reference.
2. Description of the Related Art
All patents, patent applications, patent publications, scientific articles, and the like, which will hereinafter be cited or identified in the present application, will hereby be incorporated by reference in their entirety in order to describe more fully the state of the art to which the present invention pertains.
A semiconductor wafer inspection apparatus inspects a semiconductor wafer based on a recipe that defines what is to be inspected of the wafer, defines whether or not the inspection is made, and/or defines the conditions for inspecting the wafer. This recipe is previously determined before the wafer is processed. The predetermined recipe is allocated to a process unit such as a single cassette, a single wafer or other process unit. The term “cassette” generally means a case for storing and holding wafers. Notwithstanding, in the present application, the meaning of the term “cassette” includes not only the above-mentioned general meaning but also a unit for batch-processing of wafers. A single cassette may include a plurality of slots, each of which contains a single wafer. The single cassette may, for example, include 25 slots, each containing a single wafer.
The wafer inspection apparatus processes a cassette or a wafer, based on a recipe which has previously been allocated to this cassette or this wafer prior to commencement of the inspection process. A single recipe may, if any, be allocated commonly to all the wafers included in the single process unit such as a single cassette in order to perform a batch processing, in which all the wafers in the unit are processed in accordance with the common recipe. Alternatively, the single recipe may be allocated to a single wafer or a single slot that contains the single wafer in order to perform a single wafer processing, in which each wafer is processed in accordance with each allocated recipe.
In accordance with the batch processing, all the wafers belonging to the single process unit are subjected to the same process according to the common recipe. It is difficult for the batch processing to realize a wafer-sampling process, in which some of the wafers are extracted from the single cassette and subjected to the predetermined process, while the remainder of the wafers is not processed.
Limited production of a wide variety of products may be required, wherein different varieties of cassettes are used for manufacturing the products of different types. For example, a wide variety of cassettes are used for manufacturing a wide variety of products, provided that each cassette contains a small number of wafers. This increases the cost of wafer processing and the cost of the facility. In order to solve these disadvantages, the single wafer processing may be used. This processing allows some of the wafers contained in the single cassette to be processed in a recipe, and the remainder to be processed in a different recipe.
FIG. 8A is a view illustrating an example of a conventional allocation of a recipe to all slots belonging to a process unit in accordance with the conventional batch processing. A recipe “A” defines that processes 1 and 3 are carried out and a process 2 is not carried out. Another recipe “B” defines that the processes 1 and 2 are carried out, and the process 3 is not carried out. In accordance with one example of the conventional allocation of the recipe in the conventional batch processing, the recipe “B” is allocated to all the slots 1, 2, 3, 4, - - - n, so that all the slots 1, 2, 3, 4, - - - n are subjected to a batch processing based on the same recipe “B”.
FIG. 8B is a view illustrating an example of the conventional allocation of different recipes to slots belonging to a process unit in accordance with the conventional single wafer processing. The recipe “A” defines that the processes 1 and 3 are carried out and the process 2 is not carried out. The recipe “B” defines that the processes 1 and 2 are carried out, and the process 3 is not carried out. In accordance with one example of the conventional allocation of the recipes in the conventional single wafer processing, the recipe “A” may be allocated to the slots 3 and n, and the recipe “B” may be allocated to the slots 1, 2 and 4, so that the slots 3 and “n” are subjected to the single wafer processing based on the recipe “A”, and the slots 1, 2 and 4 are subjected to the single wafer processing based on the recipe “B”.
Japanese Laid-Open Patent Publication No. 11-186366 discloses a conventional wafer processing apparatus that performs the single wafer processing.